There are two ways in which data is transmitted in a computer system-series and parallel. Devices which make use of serial communication technique transmits data bit by bit. In the parallel communication mode, data is transmitted as blocks. Parallel communication is faster than serial communication. Therefore internal connections in a computer are in parallel mode. Since for long distance and high-frequency data transmission, the parallel mode has proved unsuitable and in such cases, the serial communication method is used.
Since parallel communication is faster than serial communication, the internal connections in a computer are in such a way that the data transmission is made in parallel mode. But for long distance and high-frequency data transfer, the parallel mode has proved unsuitable and in such cases, the serial communication method is used. Besides, the multiple lines used in parallel mode could increase the expense of the communication process. And because of the same reasons, serial communication is used commonly in data transfer between a computer and it’s peripheral devices. Some of the peripheral modules in microcontrollers used for serial communication include USART, SPI, I2C, and USB.
Serial transmission is of two types-synchronous and asynchronous. In synchronous data transmission, the sender and receiver share a clock with one another. Otherwise, the sender provides a timing signal which prompts the receiver to read the next bit of the data. During data transmission, if there is no data available to transmit at a given instant, a fill character will be sent to make sure that the data is always transmitted.
In an asynchronous type of data transmission, data should be transmitted without a clock signal being sent by the sender. In general case, the sender and receiver come in agreement with the speed of transmission. To make sure the data accessing follows that agreement, both the sender and the receiver set up their own internal circuits. In order to synchronize the sending and receiving units, special bits are added to each word.
What is I2C
I2C is the abbreviation for inter-integrated circuits. It is a synchronous, serial communication protocol which is intended to allow multiple slave digital ICs to communicate with one or more master chips. This type of communication is best suitable for short distance communications within a single device. Each I2C bus consists of a clock signal and a data signal. The clock signal is generated by a current bus master.
The I2C is developed to overcome the difficulties faced when transmitting data with the help of other communication protocols such as UART and SPI. UART is an asynchronous transmission protocol and therefore devices using them must agree ahead of time on a data rate. The clocks of the devices must also have the clocks with almost same data rate. The data rate in UART is reduced because of the requirement of additional start and stop bits. Besides, the asynchronous transmission protocols are meant for data transfer between only two devices. Since a serial port can be connected to multiple devices, the bus contention happens often and it should be dealt with care to prevent damages to the devices. For asynchronous serial ports, there is a limit for the Baud rate. This is also a drawback of this communication protocol.
The SPI also has several flaws among which the requirement of increased number of pins. To connect a master device with a slave, SPI requires at least four lines. This makes the connections complex.
The main advantage of I2C is that it requires only two wires and with those two wires it can connect up to 1008 slave devices. Besides, I2C can support a multi-master system. The data rate of I2C is between the serial ports and SPI. It was developed in the year 1982 by Philips. In an earlier stage of development, the number of devices which can be connected on the bus was limited to 112 and the speed of communication allowed was very low at 100kHZ. The address space was 7-bit. When the first public specification was published in 1992, the speed was increased to 400kHZ and the address space provided was 10-bit.
One advantage of I2C bus drivers is that the bus drivers of I2C can only pull the signal line low and not high. This avoids the bus contention and related power dissipation in the system. The signal lines are connected to a pull-up resistor which restores the signal to a high level when no device is asserting it low.
I2C Operation
I2C communication is considered a little more complex than SPI and UART communication. Initially, the message that is being transmitted is broken up into two types of frames-an address frame and one or more data frames. The address frame is where the master indicates the slave to which location the data is being sent. There can be more than one data frames made of eight-bit data passed from master to slave. After the clock line goes low, data is placed on the data line. This data is sampled after the SCL goes high. When the master device leaves the SCL high and pulls SDA low, slave devices are indicated that the transmission is about the start. If more than one master devices are there to initiate communication at a single time, the device which pulls the SDA low first will take control of the buses first.
In every communication sequence, an address frame would be the one which is transmitted first. The most significant bit is the one which is being transmitted first. An R/W bit is transmitted following the MSB which indicates whether the operation is read or write. The last bit, that means the ninth bit of the frame, is an acknowledgment bit. Soon after the eighth bit is sent, the receiving device is being handed over the control of the SDA. If the SDA line is not pulled down to low by the receiver before the ninth clock pulse, it means the receiver did not receive the data or it did not know how exactly the message transmitted had to be parsed. The master device will then take a decision on how to proceed the function further.
After the address bits, the data bits are transmitted. According to R/W bit which indicates whether the operation is read or write, the data is being placed on the SDA by either the master or the slave. During the data transmission, the internal registers are auto-incremented by the slave devices to make sure that the subsequent read or write bits will be from the next register in line.
The stop condition is generated by the master once all the data frames have been sent. Stop condition is a low to high transition on SDA following a low to high transition on clock line(SCL) while the SCL remains high.
Repeated start
There can be situations when the master has to be allowed to transfer messages in one go without being interrupted by other master devices. But if the master stops the control and then start again, there is a chance of losing the control over the bus after the stop condition. Then it would have to wait until the bus is free again.
In such cases, repeated start condition is put to use. In such conditions, SDA is allowed to go high while SCL is low and then the SCL is pulled to a high while SDA is low. There is no stop condition on the bus and this gives an indication that the previous condition was not truly completed and hence the current master device maintains the control of the bus. There is no particular limit for repeated starts and the bus control is maintained by the master until it issues a stop condition.
Clock stretching
There are chances when the master’s data rate exceeds the slave’s ability to provide data. This happens either because the data which has to be transmitted by the slave is not ready yet or the previous operation is not complete. In such cases slave adopts a technique called ‘clock stretching’. In a normal case, clock generation is the duty of master devices. In such special cases slaves hold the SCL line low after the master releases it and until the slave releases the SCL line, the master is not supposed to provide additional clocks.
Advantages over other serial protocols
- I2C needs only two signals/pins to communicate with numerous devices
- It uses chip addressing, it will be a plus when we add additional devices to the bus. There is no additional wiring.
- Devices can work as both master and slave
- I2C employs better error handling functionality.
Disadvantages
- Clock speed limitation and power dissipation because of pull-up resistor
- Complex hardware and firmware compared with UART, SPI etc.
- I2C is a half-duplex protocol which adds complexity
Applications
I2C is used where short distance communication within boards or devices are needed and when we need to connect more devices to the network. It is the only choice when the bus has more than one master device. Some of the ICs that use I2C protocol are listed below.
- Atmel AT24CXX EEPROM chips
- Maxim DS1307/8 real time clock chips
- Microchip MCP7941X real time clock chips
- MCP23017 port expander
- PCA85276 40×2 LCD driver
Since this is a standardized protocol, there are many chips using this communication protocol and all microcontroller families support it.