Pulse Width Modulator operation in LPC1768

///Pulse Width Modulator operation in LPC1768

Pulse Width Modulator operation in LPC1768

Introduction.

The LPC 1768 micro-controller has a motor control PWM and 6-output general-purpose PWM.
In this tutorial, we will be learning how to use the 6-output general-purpose PWM.

Features

  • The PWM module operates using a timer or a counter.
  • There are seven-match registers that allow 6-single edge controlled or 3 double-edged controlled PWM outputs.A match can result in any of the following with optional interrupt generation:
    • Continuous operation.
    • Stop timer.
    • Reset timer.
  • The accuracy of the pulses is generated with minimum error as the pulse outputs are synchronized with the match registers. This is achieved in the software where it is required for the programmer to release new match values for the output pins to generate the pulses

Description

In reality, the PWM module is a timer module that has been given PWM functions. If the PWM mode is not enabled, the module can be used as a standard timer. It can be used as a 32-bit timer/counter with a 32-bit prescaler.

Basic Configuration

  • Like every other module configuration, the PWM module has to be powered to start any PWM operation. In the PCONP register, bit 6 or PCPWM1 should be 1 for the module to be powered. But on reset, this pin is already set to 1. So it is alright to skip this step.
  • Now the peripheral clock must be selected through the PCLKSEL0 register and then select the PCLK_PWM1 bits in it, which are bits <13,12>. The reset value is 00. The following is the function of the peripheral clock based on values on the PCLK_PWM1 bits.
PWM frequency ARM LPC1768

TABLE 1.

  • The selection of the PWM pins comes next. PINSEL4 register controls the functions of the lower half of PORT 2. The bits 0 to 11 are responsible for the functioning of the 6 PWM outputs. When configured as <0,1>, in each pair of the bits, the pins of the PINSEL4 register are selected for PWM output.
PWM Channel ARM LPC1768

TABLE 2.

  • Finally, the match register and counter registers in the peripheral have to be selected appropriately for specific functions. This will be explained in detail.

Firmware

  • DEFINITIONS: These are the definitions that will be used in the code.
  • POWER: The first step as we mentioned, is to power up the module. But since the reset value of the PCPWM1 pin in the PCONP register is 1, this line of code is pretty much insignificant.
  • PIN SELECT: Now we must select the appropriate pins that we will be using to get the PWM output by setting the appropriate bits as shown in TABLE 2.

     
  • MATCH CONTROL REGISTER: This step must be performed prior to enabling the PWM enable pin in the PWM1TCR (timer control register). Otherwise, a match event will not occur to cause shadow register contents to become effective. The idea here is simple.
    • We will be setting the PWMMR0R bit in the PWM1MCR register as 1 to enable the reset mode.
    • The PWMMR0 register will hold the value of 1 complete cycle or the full cycle.
    • Enable the latch register to load the new match value. (Use of Latch Enable Register is mentioned in the next step)
  • LATCH ENABLE REGISTER: The use of this register makes the PWM output more accurate. When the software writes the new value for the match register, the value is not used straight away. When the event of a match occurs, the contents of the shadow register will be transferred to the shadow register only if the corresponding bit in the Latch Enable Register (LER) has been set to 1. So, until a match event occurs and the corresponding LER bit is set, no effect in the PWM operation will take place.
  • COUNTER & PRESCALER: Now we must enter the counter and prescaler values through the PWM1 timer control register TCR and PWM1 prescaler register PR.
    • Enable the counter enable and pwm enable bits in the timer counter register.
    • Enter the prescaler value.
  • ENABLE THE PWM OUTPUT PINS: The corresponding bits have to be set as 1 to enable the PWM output.
PWM Output Pins

TABLE 3.

 

  • DUTY CYCLE: The final step is to enter the duty cycle of the PWM operation. This is set in the PWM match register MRx where x is 1 to 6. After entering the value to the necessary match register the corresponding latch enable must be set for the PWM operation to take effect.

    Summary

    The program can be tested using an LED or a DC Motor. The sample code for the tutorial can be found in the Code Library under the section ARM.

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